Design of digital hardware components and systems using a hardware description language (HDL). Testbench creation for digital systems. Timing analysis of single and multi-clock designs, both in theory and using computer-aided design (CAD) tools in which timing constraints are specified in a standard way. Numerical representation of values including both floating point and fixed-point representations. Arithmetic circuits for binary addition, subtraction, multiplication and division. Architecture of on-chip systems including processors or large-scale parallel computation structures. Connection between system-level components using on-chip buses, including standard buses. Pipelined Computation. Memory types, interfacing and direct memory access. Off-chip peripherals and communication protocols. Labs will include significant larger scale design on field-programmable gate arrays (FPGAs).